Computer Arithmetic and Verilog HDL Fundamentals
关于此电子书
Computer Arithmetic and Verilog HDL Fundamentals details the steps needed to master computer arithmetic for fixed-point, decimal, and floating-point number representations for all primary operations. Silvaco International’s SILOS, the Verilog simulator used in these pages, is simple to understand, yet powerful enough for any application. It encourages users to quickly prototype and de-bug any logic function and enables single-stepping through the Verilog source code. It also presents drag-and-drop abilities.
Introducing the three main modeling methods—dataflow, behavioral, and structural—this self-contained tutorial—
- Covers the number systems of different radices, such as octal, decimal, hexadecimal, and binary-coded variations
- Reviews logic design fundamentals, including Boolean algebra and minimization techniques for switching functions
- Presents basic methods for fixed-point addition, subtraction, multiplication, and division, including the use of decimals in all four operations
- Addresses floating-point addition and subtraction with several numerical examples and flowcharts that graphically illustrate steps required for true addition and subtraction for floating-point operands
- Demonstrates floating-point division, including the generation of a zero-biased exponent
Designed for electrical and computer engineers and computer scientists, this book leaves nothing unfinished, carrying design examples through to completion. The goal is practical proficiency. To this end, each chapter includes problems of varying complexity to be designed by the reader.
作者简介
Joseph Cavanagh is an adjunct professor in the computer engineering department at Santa Clara University in California.
